High-End Computing Presents
Technology Challenges

— ADAPTED FROM 2003 HPCSF CONFERENCE PRESENTATION BY DR. JOSÉ MUÑOZ, NSF

Anyone who has never made a mistake has never tried anything new.
      —  Albert Einstein

Todays high-end computing world must adapt to many technology challenges and overcome equipment and knowledge obstacles to continue its amazing record of success.  Hardware, software and system development are all pieces of the computational puzzle that must be solved to achieve real technological progress in high-end computing.


High-end computing has many pieces to its puzzle.

Improving hardware technology is the easiest problem to address because it lends itself so readily to projection (Moores Law) and measurement.  It is relatively simple to measure progress and identify gaps and potential alternatives within the existing hardware technology.  Finding and closing these gaps can be uncomplicated, since the work is physics-based and easy to understand.

Often the largest hardware issue and the most common problem with high-end computation, is the increased latency of memory.  Irregular access patterns make this even worse.  Unfortunately, adding levels of caching is not a solution to this or many computational science problems.

One failed measure of performance is the floating-point operations per second measure, or FLOPS.  Memory access problems can starve the floating-point engines.  So the question becomes, is it better to have improved FLOPS efficiency, or to arrive at a solution in a shorter period of time?

Reconfigurable devices, such as Field Programmable Gate Arrays (FPGA), are one solution to the memory access problem.  They offer the performance benefits of hardware and the flexibility of software.  To be most useful, however, the devices must be made transparent to the user.

An additional solution is interconnects, which join together thousands of processors or memory elements, to create a logic circuit.  They have high-degree radix networks with a large number of channels per router.  The routers have averaged 8 to 16 channels over the past decade, but routers with approximately 2048 channels are expected in the next 5 years.  NNSA and NSA are currently exploring these systems.

Magnetic memory or magnetoresistive random access memory (MRAM) is another new hardware option.  MRAM is made from magnetized metal, which requires electricity to change polarity, but not to maintain it.  MRAM has the storage capacity and low-cost of dynamic random access memory (DRAM), as well as the speed of static random access memory (SRAM). This new technology could become the universal memory in less than 20 years.

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